A 45nm Flash Analog to Digital Converter for Low Voltage High Speed System-on-Chips
نویسندگان
چکیده
In this paper, a 6-bit 1 Gs/sec flash analog-to-digital converter (ADC) for low voltage and high speed system-on-chip (SoC) applications is presented. Simulated with the 45nm Predictive Technology Model, the results demonstrate INL < 0.5LSB, DNL < 0.8LSB and a signal to noise and distortion ratio of 31.9dB. The Threshold Inverter Quantization (TIQ) technique is used with WPMOS/WNMOS < 1 for many transistors to keep the power consumption as low as possible. It is also observed that the ADC consumes 45.42μW of peak power and 8.8μW of average power at full speed while it operates on a power supply voltage of 0.7V. To best of the authors’ knowledge, this is the first ADC designed at the 45nm technology node.
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